Introduction to Reliability in MEMS Packaging Tai-Ran Hsu, ASME Fellow Microsystems Design and Packaging Laboratory Department of Mechanical and Aerospace Engineering San Jose State University San Jose, CA 95192 (E-mail: tairan@email.sjsu.edu) presented at International Symposium for Testing & Failure Analysis San Jose Convention Center San Jose, California, USA November 5, 2007 San Jose State University, San Jose, California © T.R. Hsu 2007“MEMS Packaging,” ed. Tai-Ran Hsu, IEE, United Kingdom, 2004. Chapter 1 Fundamentals of MEMS Packaging by T.R. Hsu & J. Custer, and Chapter 6 Testing and Design for Test by A. Oliver & J. Custer. Principal References “MEMS and Microsystems Design, Manufacture, Packaging and Introduction to Nanotechnology” 2nd Edition Tai-Ran Hsu, John Wiley & Sons, Inc., Hoboken, New Jersey, 2008 (ISBN 978-0-470-08301-7)Content Reliability in MEMS and microsystems packaging Overview of mechanical packaging of microelectronics Reliability testing for ICs and microelectronics Reliability of MEMS and microsystems Failure mechanisms in MEMS and microsystems Microfabrication and packaging induced reliability problems Testing for reliability of MEMS and microsystems Summary Future OutlookReliability in MEMS and Microsystems Packaging The critical issue of reliability is that no matter how big or small, or how sophisticated the product is designed and manufactured -Reliability of MEMS and microsystems is particularly critical as failure of many of these products can be catastrophical and devastating. Engineers cannot design reliable MEMS and microsystems without first to understand the many possible mechanisms that can cause the failure of the structure and performance of these devices and systems. Because reliability is such a critical issue in MEMS and microsystems, design alone cannot ensure the reliability of the product. Logical design + reliable testing strategies + enabling testing techniques = Assurance of reliability of the product it becomes useless if it fails to deliver the designed performance during the expected lifetime. Overview of Mechanical Packaging of Microelectronics ● To provide support and protection to the integrated circuits (IC), the associate wire bonds and the printed circuit board from mechanical and/or environmentally induced damages. Objectives of mechanical packaging of microelectronics: ● To dissipate excessive heat generated by electric Ohmic heating of the ICs. ● Dissipation of excessive heat generation has become a vital issue in moleculaar electronic circuits with nanoscale transistors. Chip (L0) Module (L1) Card (L2) Board (L3) Gate (L4) Level 1 Level 2 Level 3 Level 4 The 4 levels of microelectronics packaging: Level 1: Silicon chip into a module. Level 2: Card level. Level 3: Cards to boards Level 4: Boards to system Level 1 and 2 are of primary interest to mechanical engineers. Overview of Mechanical Packaging of MicroelectronicsOverview of Mechanical Packaging of Microelectronics – Cont’d Level 1 & 2 packaging: Wire bond Si die Die pad Interconnect J-Lead Interconnect Gull-wing Lead Solder joint Solder joint Printed Circuit Board (or Wirebound) Board Die attach Silicon die Epoxy with IC encapsulant Die pad and die attach Wire bond Interconnects Solder joints Printed circuit board Printed circuit Principal components in a chip: Plastic encapsulated chip: Chips with wire interconnects:IC Chip Solder Balls Vias Mold Compound (plastic or ceramics) Die attach Printed Circuit Board (PCB) Solder Ball Via Solder Joints PCB Overview of Mechanical Packaging of Microelectronics – Cont’d Level 1 & 2 packaging: Ball Grid Arrays (BGA) Packages 770 I/OFailure mechanisms: ● Mismatch of coefficients of thermal expansion (CTE) between the attached materials. Reliability issues: ● Die and passivation cracking. Wire bond Si die Die pad Interconnect J-Lead Interconnect Gull-wing Lead Solder joint Solder joint Printed Circuit Board (or Wirebound) Board Die attach Overview of Mechanical Packaging of Microelectronics – Cont’d Level 1 & 2 packaging: ● Delamination between the die, die attach, die pad and plastic passivation. ● Fatigue failure of interconnects and solder ball joints. ● Fatigue-fracture of solder joints and solder balls. ● The warping of printed circuit board. ● Fatigue-fracture of materials due to thermal cycling and mechanical vibration. ● Deterioration of material strength due to environmental effects such as heat and moisture. ● Intrinsic stresses and strains induced by fabrication processes. ● Malfunctioning of the chip due to over-heating.Reliability Testing for ICs and Microelectronics These routine tests are performed before the products are shipped to the customers: Thermal Shock Tests -60oC +100oC Δt according to specification Time, t Temperature, T(t) Thermal Cycling Tests -60oC +100oC Time, t Temperature, T(t) Δt1 Δt2 Δt3 Burn-in Tests Products are placed in autoclaves at specified temperatures and humidity for hundreds of hours for endurance tests.Reliability of MEMS and Microsystems Reliability of ICs and microelectronics are more structure-related. -Failure by mechanical causes dominates. Reliability of MEMS and microsystems have all the issues as in ICs and microelectronics, with further complications with: Issues related to their performances both upon shipping and in the subsequent in-service in the designed life span. ● Failure mechanisms for microsystems are much more complicated than those in microelectronics for the following reasons: ● Microsystem components are designed to interact with various substances (e.g., light beams, chemical solvents and biological fluids) at various environmental conditions (temperatures and pressures). ● Many microsystems are hermatically sealed and are expected to perform in both immediate-and long-term. ● Some failure of microsystems is impossible to predict and prevent, e.g., the stiction of delicate components in micro-optical switches with sealed plastic package, induced by slow release of moisture (de-gassing) of plastic encapsulating materials. ● Unlike IC and microelectronics, NO standard is available for reliability testing for MEMS & microsystems. ● New testing procedures and criteria need to be developed for every new product. Reliability of MEMS and MicrosystemsEnvironmental effects Temperature, humidity, dusts and toxic gas High Improper bonding and sealing, poor die High protection and isolation Packaging Residual stresses and molecular forces High inherent from microfabrication. Excessive intrinsic stresses Aging and degassing of plastic and polymers. Moderate Corrosion and erosion of materials Deterioration of materials Collapse of electrodes due to excessive High deformation. Electromechanical break-down Low Moderate Low in silicon, moderate in plastic Moderate to high High ▪ Local stress concentration due to surface roughness. ▪ Improper assembly tolerances ▪ Vibration-induced high cycle fatigue failure. ▪ Delamination of thin layers. ▪ Thermal stresses by mismatch of CTE. Mechanical Failure Mode Causes Probability Failure Mechanisms in MEMS and Microsystems• Intrinsic stresses/strains are introduced by microfabrication processes. They must be accounted for in the overall stress analysis of the finished MEMS structures. Microfabrication and Packaging Induced Reliability Problems Intrinsic Stresses/Strains ● Possible sources for intrinsic stresses: • Doping of impurities induces lattice mismatch and change of atomic sizes. • Atomic peening due to ion bombardment, e.g., in ion implantation and plasma etching processes. • Microvoids in thin films created by the escape of carrier gases e.g., in CVD processes. • Entrapment of carrier gases in microfabrication processes. • Change of grain boundaries due to change of inter-atomic spacing after deposition and diffusion of foreign materials. • Shrinkage of polymers during curing. ● Quantification of intrinsic stresses/strain is not possible. Realistic mechanistic models for intrinsic stress analysis need to be developed. Residual Stresses/Strains ● They are induced by joining dissimilar materials with distinct coefficient of thermal expansion (CTE) to form microstructural components. ● For example, a silicon substrate with a SiO2 film created on its surface by an oxidation process. Silicon substrate SiO2 film αSiO2 = 0.5 x 10-6/oC αSi = 2.33 x 10-6/oC αSi/αSiO2 = 5 ● If the oxidation process takes place at 1000oC, what will happen to the finished structure after it is cooled down to the room temperature? ● Shape change due to residual strains ● Cracks in SiO2 due to residual stresses Microfabrication and Packaging Induced Reliability ProblemsResidual Stresses/Strains Cont’d At 1000oC: At 20oC: SiO2 Si During oxidation by CVD Deformed shape after oxidation SiO2 Si + -Depth of Beam Bending Stress SiO2 Si The residual stresses and strains in the finished structure after the oxidation process can be illustrated as: The residual strains The residual bending stresses Microfabrication and Packaging Induced Reliability Problems● A finite element analysis on an oxidation process for a 4-μm thin silicon oxide film over silicon substrate resulted in a compressive residual bending stress as high as 2000 MPa in the oxide film [Hsu and Sun, 1998]. This falls in the range of 10-5000 MPa residual stresses in thin films as reported by Madou [1997]. Residual Stresses/Strains Cont’d The residual bending stresses SiO2 Si + -Depth of Beam Stresses SiO2 Si Microfabrication and Packaging Induced Reliability ProblemsTesting for Reliability of MEMS and Microsystems Following major tasks are involved: ● Design for testing: ● Set the testing strategy, e.g., identifying testing points. ● Parametric testing ● Testing during assembly ● Burn-in and final testing ● Self testing ● Testing during use Design for Test is an important responsibility of design engineers for MEMS and microsystems ● Establish “Range of Acceptable Device Performance” with: ● Proper PASS/FAIL limits for test results ● a proper balance between Quality (being too lenient) and Waste (being too stringent) ● Performing the following tests:Testing for Reliability of MEMS and Microsystems – Cont’d Parametric testing ● For inspecting key components during and after the fabrication. ● Requires the definition of parameters, e.g., film resistances, surface stress/strain for such testing. ● Requires proper selection of test points on the workpiece. ● Parametric test structures are attached to the workpiece for the testing. Example 1: The van der Pauw sheet resistance test structure. Pass current to Pad 2 & 3 Measure voltage from Pad 1 & 4 The surface resistance is: 2,31,4 IV Rc =Testing for Reliability of MEMS and Microsystems – Cont’d Parametric testing -Cont’d Example 2: Parametric test structure for measuring tensile strain. Induced tension Buckling of thin beam ε π 3 t 2 2 Lc = The compressive strain ε responsible for the buckling of the thin beam is: where Lc = length of the beam, t = thicknessTesting for Reliability of MEMS and Microsystems – Cont’d Parametric testing -Cont’d Example 3: Parametric test structure for measuring both tensile and compressive strains. Beam electrodes are connected and anchored on the workpiece at shallow angles. Tension gap change in A & B Compression Gap change in A & C Associated tensile or compressive strains can be correlated to the measured capacitances from these beam electrodes.Testing for Reliability of MEMS and Microsystems – Cont’d Parametric testing -Cont’d Example 4: Parametric test structure using resonator for monitoring surface stresses. Comb Drives Springs Vibrating Mass ● Change of stiffness of springs due to change of stresses in attached workpiece leads to the change of resonant frequencies. ● Resonant frequency of the resonator can be generated by electrical stimulator. ● Shifting of resonant frequencies in the resonator can be related to the surface stresses in the workpiece.Testing for Reliability of MEMS and Microsystems – Cont’d Testing During Assembly For two (2) purposes: ● To determine which device components are good enough for further packaging into devices. ● To monitor the yield of the packaging process. Example 1: Texas Instrument’s digital micromirror device with 0.5 to 1.5 million electrostatically actuated mirrors at 16 μm x 16 μm Micromirrors Dies ● Mirrors offer 0 or 1 signals on its reflected intensities. ● The open center in the array shows the CMOS beneath that supplies voltage to rotate the mirrors for reflecting lights. ● Mirrors are tested for reflecting lights at increasing voltage supplies by the CMOS. ● Dies with mirror fails to perform are rejected. ● Further inspection on mirror functions after dies are assembled. Testing for Reliability of MEMS and Microsystems – Cont’d Testing During Assembly -Cont’d Example 2: infrared detectors by Dexter Research Center Inc. of Dexter, Michigan The particular device is thermopile-based single element bulk micromachined infrared detector for home security, tympanic thermometers, fire detection, and remote temperature measurement. ● Final assembly of device only after passing all these tests. Series of tests are conducted during assembly: ● Electric parametric tests on wafers on: e.g., sheet and contact resistances. ● Same tests after bulk manufacturing by wet etching. ● Further Testing on: ● die with infrared black coating ● wafer dicing ● mounting ● wire bonding ● Partially packaged device exposed to calibrated blackbody infrared source, with further testing on: coating, wirebond, tilting & mounting. Testing for Reliability of MEMS and Microsystems – Cont’d Burn-in Tests for MEMS and Microsystems ● These are the tests conducted after all components are assembled into a device. ● Some microdevices can only be tested after the assembly. ● “Burn-in” tests are necessary b/c many microdevices can fail to perform due to invasion of unwanted foreign substances, e.g., air to some packaged infrared detectors, or dust particles and moisture to the packaged micromirrors. ● A typical failure rate history for a product – a “Bath-tub” curve: Failure Rate Time (in logarithmic scale) Useful Life Infant Mortality Wear-out ● The GOAL of “Burn-in” tests is to have the “Infant mortality” failure of the device occurs in the factory, but not in the field.Testing for Reliability of MEMS and Microsystems – Cont’d Burn-in Tests for MEMS and Microsystems -Cont’d ● Requirements for proper design of burn-in tests: ● Identify possible failure modes of the particular device. ● Identify factors that can accelerate the failure rates of the device. ● Possible factors for accelerating failure rates: ● Mechanical and thermal loading. ● Humidity. ● shifting of applied threshold voltage. ● Arrhenius model can be used to identify accelerating loading for Burn-in tests. This model states: “device failure is dependent of the energy barrier surmounted for failure to occur. “ ● This model can relate failure rate of a device at one temperature to the failure rate at another temperature. ● We may thus accelerate the failure of a device at a higher temperature using this model.Testing for Reliability of MEMS and Microsystems – Cont’d Self Testing ● For MEMS and microsystems, it involves using electric stimuli that mimics the real input loads. ● Self testing is important to many electronics devices and computers to ensure proper functioning of various components in the device before actually using the device. Cavity Cavity Silicon Die with Diaphragm Constraint Base Measurand Fluid Inlet Measurand Fluid Inlet (a) Back side pressurized (b) Front side pressurized ● Self test device, e.g., a pair of electrodes can mimic mechanical load to micro pressure sensors:Testing for Reliability of MEMS and Microsystems – Cont’d Self Testing -Cont’d A self testing device for a thermopile-based infrared detector:Testing for Reliability of MEMS and Microsystems – Cont’d Self Testing -Cont’d Stimuli other than electrical means: Ambient air for micro pressure sensors. Earth gravitation for microaccelerometers. Oxygen content in air for gas sensors. Testing During Use It is used for calibrations of microsensors in the designed life span. Input for these tests usually involve the natural loads as in self testing. Testing during use ensures the proper functioning of devices for the intended applications.Summary ● Failure mechanisms in ICs and microelectronics are primarily by mechanical means, e.g., over-stressing or over-heating. ● Failure mechanisms in MEMS and microsystems attribute to many more causes: ● Improper interfacing of delicate core components and the working media can also result in failure of MEMS and microsystems. ● Improper sealing and encapsulation in packaging can cause failure of microsystems such as by undesired dusts and moisture to delicate core components. ● Fabrication induced means such as intrinsic and residual stresses and strains. ● Fault-proof design for reliability for MEMS and microsystems appear unrealistic. Intelligent testing is a practical approach to ensure reliability of these products.1990 1995 2000 2005 2010 2015 2020 Materials Equipment Design & modeling; Testing Interconnect Process Packaging Categories Standards Timeline Summary – cont’d ● While testing is viewed to be a practical solution to reliability assurance of MEMS and microsystems, cost for developing effective and reliable testing remain high – mainly because of lack of standard to follow: Likely extensionFuture Outlook ● Reliability can become a central issue in the production of market-demanded “Smart, multi-functional, robusting and low cost” products involving MEMS and microsystems. ● Current strong demand for further miniature devices will definitely create more and more reliability problems in product development and marketing. ● Much R&D effort is urgently needed, as devices are made smaller at all times. One such example is the packaging and reliability issues in molecular Electronics as illustrated in a recent breakthrough in successful production of 45 nm transistors by Intel Corporation:90 nm Node 65 45 32 22 2003 2005 2007 2009 2011 Year Transistor Size Increase Leakage-Another major challenge! Single-Electron Transistor ? Silicon-based microtechnology Possible materials? Nanotechnology? (a likely technology) Length: 50 nm L = 30 L = 20 L = 15 L = 10 Gate oxide: 1.2 nm Gate oxide: 0.3 nm 2013 16 nm L=7 nm 2017 8 nm 3 nm Intel roadmap on nanotransistors using microtechnology Advantages of molecular transistors: (1) Low unit cost. (2) Narrow gates for faster on-off→ boost speed limit of the integrated circuits Reliability Issues: (1) Heat dissipation with narrowly spaced electric conductors (2) Electric leakage cross electric conductors Anatomy of a TransistorThank You for Your Attention and Interest