GCSE Electronics June 2005 Paper Ans Key

Version : 1.0 Copyright © 2005 AQA and its licensors. All rights reserved. abc General Certificate of Secondary Education Electronics 3432 Foundation Tier Mark Scheme 2005 examination June series Mark schemes are prepared by the Principal Examiner and considered, together with the relevant questions, by a panel of subject teachers. This mark scheme includes any amendments made at the standardisation meeting attended by all examiners and is the scheme which was used by them in this examination. The standardisation meeting ensures that the mark scheme covers the candidatesresponses to questions and that every examiner understands and applies it in the same correct way. As preparation for the standardisation meeting each examiner analyses a number of candidatesscripts: alternative answers not already covered by the mark scheme are discussed at the meeting and legislated for. If, after this meeting, examiners encounter unusual answers which have not been discussed at the meeting they are required to refer these to the Principal Examiner. It must be stressed that a mark scheme is a working document, in many cases further developed and expanded on the basis of candidatesreactions to a particular paper. Assumptions about future mark schemes on the basis of one years document should be avoided; whilst the guiding principles of assessment remain constant, details will change, depending on the content of a particular examination paper. AQA GCSE Mark Scheme, 2005 June series Electronics Foundation Tier 1 (a) live! earth! neutral! (3 marks) (b) (i) 1 earth pin! 2 fuse! 3 cord grip! (ii) 1 conducts current to earth in the event of a fault! 2 fuse fails! if too much current flows! 3 stops wires pulling out of terminals! (7 marks) Total 10 marks 2 Resistor ! Capacitor ! Diode ! LED ! LDR ! Lamp ! Variable resistor ! Loudspeaker ! Battery ! Switch ! (10 marks) Total 10 marks 2Electronics AQA GCSE Mark Scheme, June 2005 series 3 (a) (i) light sensor! movement sensor! (ii) lamp! (iii) comparator! (4 marks) (b) (i) AND gate! (ii) comparator! (iii) light sensor! (3 marks) (c) MOSFET! (1 mark) (d) (i) timer or monostable! (ii) between AND gate and MOSFET! (2 marks) Total 10 marks 4 (a) (i) A ! Q! B! (ii) A B Q 0 0 1! 0 1 0! 1 0 0! 1 1 0! (7 marks) (b) (i) NAND! (ii) A ! Q! B (3 marks) Total 10 marks 3AQA GCSE Mark Scheme, 2005 June series Electronics 5 (a) capacitor! 680 µF ! 40 V! polarity indicator! (4 marks) (b) resistor! 3! 6! 0! (Ω) 5%! to limit current! (6 marks) Total 10 marks 6 (a) aerial! rf tuned circuit! demodulator! af amplifier! loudspeaker! (5 marks) (b) (i) 2 /0.01 =! 200! (ii) current amplification! (iii) microphone amplifier! loudspeaker power supply! (5 marks) Total 10 marks 7 (a) collector! base! emitter! (3 marks) (b) (i) 12 2 0.5 =! 9.5 V! (ii) 9.5 /0.025 =! 380 Ω ! (iii) 390 Ω ! (iv) 9.5 x 0.025 =! 0.24 W! (7 marks) Total 10 marks 4Electronics AQA GCSE Mark Scheme, June 2005 series 8 (a) and (b) start are you leaving the house? press system switch 20 s delay switch on system enter state of sensors has a sensor been activated? 10 s delay input code to disable alarm is code correct? sound alarm (10 marks) decision! input! process! output! loop! ! ! ! ! ! 5AQA GCSE Mark Scheme, 2005 June series Electronics 8 (c) state entered into system! system detects activated sensor! delay 10 seconds! no correct code entered! alarm is sounded! (5 marks) (d) example answer, others possible let N = 0 input code to disable alarm is code Y correct? N let N = N + 1 is N = 3? N Y sound alarm (5 marks) Total 20 marks !! ! ! ! ! ! 6Electronics AQA GCSE Mark Scheme, June 2005 series 9 (a) reed switch 10 s timer 2nd timer audible warning device reset combination logic gate of switches (6 marks) (b) (i) 12 V! 0 V! (ii) 12 V/10 kΩ = ! 1.2 mA! (4 marks) (c) Reset +Vs Discharge Threshold Output label Trigger Ground Control (8 marks) (d) (i) door opens, output from circuit goes low! m/s needs input voltage to drop! below a certain level ! to trigger! ! ! ! ! ! ! ! ! ! ! ! ! ! ! 7AQA GCSE Mark Scheme, 2005 June series Electronics (ii) 0 V! Vs! (6 marks) (e) (i) S1 open! S2 closed! (ii) 0! (iii) NAND gate requires logic 1 at both inputs! to give out logic 0 ! and reset 2nd timer! (6 marks) Total 30 marks Paper Total 120 8